Curriculum
- 1 Section
- 31 Lessons
- 10 Weeks
- Digital Logic Design Course التصميم الرقمي31
- 2.1Number Systems60 Minutes
- 2.2Digital Arithmetic Operations45 Minutes
- 2.3Signed Numbers & Sub35 Minutes
- 2.4Binary Codes18 Minutes
- 2.5Logic Gates – Combinational System – Design Process I50 Minutes
- 2.6Logic Gates – Combinational System – Design Process II43 Minutes
- 2.7Manipulation Of Algebraic Functions17 Minutes
- 2.8Digital implementation Of Functions45 Minutes
- 2.9De morgan’s law – Complements38 Minutes
- 2.10NAND & NOR implementation34 Minutes
- 2.11karnaugh Maps40 Minutes
- 2.12Exclusive-OR-Implementation – XOR55 Minutes
- 2.13Implicants22 Minutes
- 2.14Don’t Cares20 Minutes
- 2.15Five and six inputs Karnaugh Maps13 Minutes
- 2.16Multiple output problem16 Minutes
- 2.17Combinational Design & Full Adders34 Minutes
- 2.18two bits adder – Sixteen bits Adder – Binary Subtractor/ Comparator38 Minutes
- 2.19Decoder49 Minutes
- 2.20Encoder17 Minutes
- 2.21Multiplexer20 Minutes
- 2.22Three State Gates8 Minutes
- 2.23Gate Arrays15 Minutes
- 2.24Gate Arrays using ROM and PAL18 Minutes
- 2.25Analysis of Sequential Systems Moore and Mealy40 Minutes
- 2.26Latches and Flip Flops I26 Minutes
- 2.27Latches and Flip Flops 228 Minutes
- 2.28Analysis of Sequential Systems (Moore Model)43 Minutes
- 2.29Analysis of Sequential Systems (Mealy Model)18 Minutes
- 2.30Design of Sequential Systems39 Minutes
- 2.31Design of Sequential Systems II
Digital Logic Design Course:
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1- Number Base Conversion
2- Binary Manipulation And Complements “Digital Arithmetic Operations”
3- Signed Numbers & Sub ” Subtraction Using Complements”
4- “Binary Coded Decimal” Binary Codes
5- Design Process I
6- Design Process II
7- Switching Algebra
8- Manipulation of Algebraic Functions
9- Implementation of functions
10- Complements
11- NAND and NOR Implementation
12- Exclusive OR “X OR” Implementation
13- K “karnaugh maps” Maps
14- Implicants
15- Don’t Cares
16- Five Variable Map
17- Multiple output problems
18- Designing Combinational Systems
19- Adders Latest
20- Decoders
21- Encoders
22- Three State Gates
23- Gate Arrays
25- Designing With ROM , PLA and PAL
26- Larger Examples
27- Sequential Systems
28- Latches
29- Other Flip Flops
30- Analysis of Sequential Systems ” Moore Model”
31- Mealy Model
32- Design of Sequential Systems
Course Features
- Lectures 31
- Quiz 0
- Duration 50 hours
- Skill level All levels
- Language English
- Students 44
- Assessments Yes